spacepaste

  1.  
  2. #define F_CPU 6000000UL
  3. #define BAUD 9600
  4. #define UBRR F_CPU/16/BAUD-1
  5. #define DD_MOSI PB3
  6. #define DD_MISO PB5
  7. #define DD_SCK PB5
  8. #define DDR_SPI DDRB
  9. #define SS PB2
  10. #include <avr/io.h>
  11. #include <avr/interrupt.h>
  12. #include <util/delay.h>
  13. void SPI_SlaveInit(void);
  14. char SPI_SlaveReceive(void);
  15. void usart_init(unsigned int);
  16. void usart_tx(unsigned char);
  17. volatile uint8_t plant[] = {0x41,0x42,0x43,0x44,0x45,0x46};
  18. /* Limits
  19. * Low Normal
  20. * Chili 3.83V 2.85V
  21. *
  22. * */
  23. int main()
  24. {
  25. ADMUX = (1<<REFS0)|(1<<ADLAR); // Set left-adj, AREF as voltage reference and use channel 0
  26. usart_init(UBRR);
  27. SPI_SlaveInit();
  28. //ADCSRB = ~(7<<ADTS0);
  29. //ADCSRA = (1<<ADEN)|(1<<ADATE)|(1<<ADIE)|(1<<ADPS2)|(1<<ADPS1)|(1<<ADPS0); // prescaler 128
  30. ADCSRA = (1<<ADEN)|(1<<ADIE)|(1<<ADPS2)|(1<<ADPS1)|(1<<ADPS0); // prescaler 128
  31. sei();
  32. while(1)
  33. {
  34. // ADCSRA |= (1<<ADSC);
  35. _delay_ms(1000);
  36. }
  37. }
  38. void usart_init(unsigned int baud)
  39. {
  40. UBRR0H = (unsigned char)(baud>>8);
  41. UBRR0L = (unsigned char)baud;
  42. UCSR0B = (1<<RXEN0)|(1<<TXEN0)|(1<<RXCIE0);
  43. // Setting up frame-format
  44. UCSR0C = (1<<UCSZ01)|(1<<UCSZ00); // 8 data-bits
  45. UCSR0C |= (1<<USBS0); // 2 stop-bits
  46. UCSR0C |= (1<<UPM01); // parity even
  47. }
  48. void usart_tx(unsigned char data)
  49. {
  50. while (!(UCSR0A & (1<<UDRE0)))
  51. ;
  52. UDR0 = data;
  53. }
  54. void SPI_SlaveInit(void)
  55. {
  56. DDR_SPI = (1<<1)|(1<<DD_MISO); // MISO is output / PINB0 for debugging
  57. SPCR = (1<<SPIE)|(1<<SPE); // enable SPI and activate interrupt
  58. }
  59. ISR(SPI_STC_vect)
  60. {
  61. if (SPDR == 0x20)
  62. {
  63. PORTB |= (1<<1); // switch ON LED when sent value equals 0x20
  64. SPDR = 0xff;
  65. }
  66. else if (SPDR == 0x21)
  67. {
  68. PORTB &= ~(1<<1); // switch OFF LED when sent value equals 0x21
  69. SPDR = 0xee;
  70. }
  71. }
  72. ISR(ADC_vect)
  73. {
  74. usart_tx(0x0A);
  75. usart_tx(0x0D);
  76. }
  77.